graph_description_ram_rom.test.cpp File Reference

#include "barretenberg/boomerang_value_detection/graph.hpp"
#include "barretenberg/common/test.hpp"
#include "barretenberg/stdlib/primitives/circuit_builders/circuit_builders.hpp"
#include "barretenberg/stdlib/primitives/memory/ram_table.hpp"
#include "barretenberg/stdlib/primitives/memory/rom_table.hpp"

Go to the source code of this file.

Typedefs
using	Builder = UltraCircuitBuilder
using	field_ct = stdlib::field_t< Builder >
using	witness_ct = stdlib::witness_t< Builder >
using	rom_table_ct = stdlib::rom_table< Builder >
using	ram_table_ct = stdlib::ram_table< Builder >

Functions
	TEST (boomerang_rom_ram_table, graph_description_rom_table)
	Test graph description for ROM table operations.
	TEST (boomerang_rom_ram_table, graph_description_ram_table_read)
	Test graph description for RAM table read operations.
	TEST (boomerang_rom_ram_table, graph_description_ram_table_write)
	Test graph description for RAM table write and read operations.

Typedef Documentation

Builder

using Builder = UltraCircuitBuilder

Definition at line 13 of file graph_description_ram_rom.test.cpp.

field_ct

using field_ct = stdlib::field_t<Builder>

Definition at line 14 of file graph_description_ram_rom.test.cpp.

ram_table_ct

using ram_table_ct = stdlib::ram_table<Builder>

Definition at line 17 of file graph_description_ram_rom.test.cpp.

rom_table_ct

using rom_table_ct = stdlib::rom_table<Builder>

Definition at line 16 of file graph_description_ram_rom.test.cpp.

witness_ct

using witness_ct = stdlib::witness_t<Builder>

Definition at line 15 of file graph_description_ram_rom.test.cpp.

Function Documentation

TEST() [1/3]

TEST	(	boomerang_rom_ram_table	,
		graph_description_ram_table_read
	)

Test graph description for RAM table read operations.

This test verifies that:

• Reading random values at sequential indices creates one connected component
• No variables are in one gate due to connections through table reads

Definition at line 68 of file graph_description_ram_rom.test.cpp.

TEST() [2/3]

TEST	(	boomerang_rom_ram_table	,
		graph_description_ram_table_write
	)

Test graph description for RAM table write and read operations.

This test verifies that:

• Alternating write and read operations create one connected component
• Non-sequential access patterns work correctly
• No variables are in one gate

The test includes:

• Initial zero initialization
• Multiple update-read cycles
• Non-sequential read access pattern

Definition at line 116 of file graph_description_ram_rom.test.cpp.

TEST() [3/3]

TEST	(	boomerang_rom_ram_table	,
		graph_description_rom_table
	)

Test graph description for ROM table operations.

This test verifies that:

• Reading random values at sequential indices creates one connected component
• No variables are in one gate due to connections through table accesses

Definition at line 26 of file graph_description_ram_rom.test.cpp.